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Control Unit L1 Testbench - #25

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tonykorycki wants to merge 2 commits into
NYU-Processor-Design:mainfrom
tonykorycki:test/control-unit-tb
Closed

tonykorycki wants to merge 2 commits into
NYU-Processor-Design:mainfrom
tonykorycki:test/control-unit-tb

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@tonykorycki

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Closes #10

draft: CI will fail until src/control_unit.sv is implemented

Adds tb for the control unit that checks :

  • all 2048 {opcode, funct3, instr[3]} combinations against the control table 4 times each wiht the other instruction bits randomized
  • 13 real instructions
  • no x/z on on any output
  • funct3 == instr[14:12] whenever branch_decoder_on is 1

Also: gen_control_table.py now also generates ctrl_diff() so failures name the fields that differ and make parsing easier

@tonykorycki

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superseded by #33

@tonykorycki tonykorycki closed this Nov 3, 2026
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Complete level 1 tests in level1_tb/control_unit_tb.sv

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