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Add CSME 18-21 support (MTL/ARL/LNL/PTL) - #70

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Nabing954:csme17-plus-support
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Add CSME 18-21 support (MTL/ARL/LNL/PTL)#70
Nabing954 wants to merge 2 commits into
platomav:masterfrom
Nabing954:csme17-plus-support

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@Nabing954

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Hello,

I extended ME Analyzer to detect and parse CSME 17+/18+/21+ firmware (Meteor Lake, Arrow Lake, Lunar Lake, Panther Lake era) and would like to contribute the work upstream. The change is based on v1.311.0 r377 and touches MEA.py only (+597/-39 lines).

What was reverse engineered

  • CSE Layout Table v2 (CSME 18+): new pointer layout with pUTOK/pFLOG entries, second Fault Log (FLOG2) on CSME 21+, variable-size Pointers Table (Size = 0x58 MTL/LNL vs 0x60 PTL), internal CRC-32 validation, and detection in descriptor-less images / new flash descriptor format
  • $MN2 manifests: RSA-4096 R2 variant (SHA-384, modulus_size = 128 DWords)
  • Key Manifest extension 22 R2: entries with embedded SHA-384 public key hash
  • Reverse engineered CSE extensions (from Intel MFIT): Ext 27 Target Platform List with Hardware ID entries, Ext 28 Sub-Binary Info; plus Ext 23 Signed Package Info v2 handling (replaces Ext 0F at CSME 18+, with non-empty checks so absent Ext 0C doesn't hijack selection)
  • Post-Quantum Cryptography manifest detection (CSME 18+/MTL+)
  • New partitions: ESEPKG (nested logical boot partition), SSPH + CNViP (CSME 21+), OSSE SROM/KM/RT (CSME 20+) including optional OSSE Region Layout Table detection
  • Engine manifest markers: RBEP/NFTP .man patterns replacing FTPR at CSME 18+ (no more fwupdate module; NFTP/RBEP carry the engine version)
  • Variant mapping: IntelRec/PMCC/IUP version-to-platform mapping for MTL (1800), ARL-S (1900), LNL (2000), PTL (2100) incl. x100 versioning scheme and SOCC as PCHC successor

Testing

Verified against real CSME 18.x-21.x firmware images from MTL/ARL/LNL/PTL systems (layout parsing, partition enumeration, manifest extraction and version reporting).

Notes

Thanks for the great tool and years of documentation that made this possible.

Extend ME Analyzer to detect and parse CSME 17+/18+/21+ firmware,
reverse engineered from Meteor Lake and newer images plus Intel MFIT:

- CSE Layout Table v2 (CSME 18+): pUTOK/pFLOG region pointers, second
  Fault Log (FLOG2, CSME 21+), variable-size Pointers Table, internal
  CRC-32 validation and descriptor-less image detection
- $MN2 manifests: new RSA-4096 R2 variant (SHA-384, 128 DWord modulus)
- Key Manifest extension 22 R2 entries with embedded SHA-384 public
  key hash
- Reverse engineered extensions: Ext 27 Target Platform List (Hardware
  ID entries), Ext 28 Sub-Binary Info, Ext 23 Signed Package Info v2
  (replaces Ext 0F at CSME 18+)
- Post-Quantum Cryptography manifest detection (CSME 18+/MTL+)
- New partition types: ESEPKG, SSPH (CSME 21+), CNViP (CSME 21+),
  OSSE SROM/KM/RT (CSME 20+) incl. optional OSSE Region Layout Table
- RBEP/NFTP engine manifest markers replacing FTPR at CSME 18+
- Engine/Independent firmware variant mapping for MTL/ARL/LNL/PTL
  (PCHC, PMC and new-gen IUP with x100 versioning scheme)
- Updated SKU/platform unsupported checks for new platforms

Based on ME Analyzer v1.311.0 r377.
Adds FTBL dictionaries 0A/0B/0C/0F/1E (~9.9k entries) required by the CSME 18-21 MEA.py changes; without them MTL+ images fail with 'Could not find File System Platform 0x12'. Purely additive, no existing platforms modified.
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